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Document Outline

• 5.0 Miscellaneous Peripherals
  • 5.1 Keyboard
  • 5.2 Mouse
  • 5.3 Keyset
  • 5.4 External Device Interface
  • 5.4.1 Diablo Printer
  • 5.4.2 Versatec Plotters and Printer/Plotters
  • 5.5 Parity Error Detection
• 6.0 Disk and Controller
  • Figure 8 -- Disk Data Structures
  • 6.1 Disk Controller Implementation
• 7.0 Ethernet
  • 7.1 Programming Characteristics
  • 7.2 Ethernet Hardware
  • 7.3 Ethernet Microcode
  • Fig. 9 -- Ethernet Control
• 8.0 Control RAM, ROM, and S Registers
  • 8.1 RAM-Related Tasks
  • 8.2 Processor Bus and ALU Interface
  • 8.3 Microinstruction Bus Interface
  • 8.4 Microinstruction Memory Banks
  • 8.5 Standard Accumulator Access
  • 8.6 Interpretation of Emulator Traps
  • 8.7 M and S Registers
  • 8.8 Restrictions and Caveats
• 9.0 Nuts and Bolts for the Microcoder
  • 9.1 Standard Microcode Conventions
  • 9.2 Microcode Techniques which Need not be Rediscovered
  • 9.2.1 Microcode Subroutines
  • 9.2.2 The Silent Boot
  • 9.2.3 Debugging the Emulator
  • 9.2.4 How to tell if Extended ROM or RAM Exsists
  • 9.2.5 RAM Utility Area
  • 9.2.6 Other Information
• Appendices
  • Appendix A -- Microinstruction Summary
  • Apendix B -- Standard Reserved Memory Locations
  • Appendix C -- Reserved SIO Bits
  • Appendix D -- Standard Tasks
  • Appendix E -- S-Group Instruction Summary
  • Appendix F -- Alto I / Alto II Differences
  • Appendix G -- Summary of Known Features/Bugs
  • Appendix H -- PARC/SDD Reserved Memory Locations
  • Appendix I -- PARC/SDD Reserved SIO Bits
  • Appendix J __ PARC/SDD Tasks
  • Appendix K -- Optional Alto Peripherals