Assembler Concepts Copyright 2008 by David Woolbright



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Assembler Concepts

  • Copyright © 2008 by David Woolbright.


An Old, Durable Architecture

  • The two main manuals are



Documentation

  • IBM documentation for the High-level Assembler is available over the web:

  • http://www-03.ibm.com/servers/eserver/zseries/zos/bkserv/zswpdf/zarchpops.html

  • http://www-306.ibm.com/software/awdtools/hlasm/library.html#hlasm5



Architecture - Memory

  • Bit

    • Binary Digit
  • Byte

    • Zone Portion – 4 Bits
    • Numeric Portion – 4 Bits
  • Word

    • 4 Bytes
    • Word Boundary (Evenly Divisible by 4)


Architecture - Memory

  • Halfword

    • 2 Bytes
    • Halfword Boundary (Evenly Divisible by 2)
  • Doubleword

    • 8 Bytes
    • Doubleword Boundary (Evenly Divisible by 8)


Architecture - Registers

  • 16 General Purpose Registers

    • 32 Bits in a Registers
    • 4 Bytes in a Register
    • 1 Word in a Register
    • Used for Binary Arithmetic
    • Used for creating Addresses
    • Numbered 0 - 15


What does a register look like?



There are 16 GP Registers in There, Somewhere



Addressing

  • Base/Displacement Scheme

    • Makes Object code smaller
    • Makes Linkage simpler
  • A specific byte is indicated by specifying a beginning address (base) and an offset from the base (displacement)

  • Base address contained in a General Purpose Register

  • Displacement specified in an instruction



Addressing



Object Instruction Formats

  • Storage to Storage (SS1)

  • General Format:

  • OP LL1 B1D1 D1D1 B2D2 D2D2

  • OP – Operation code

  • LL1 – Length of Op One – 1 (Max 255)

  • B1D1D1D1 – Base/Disp of Operand 1

  • B2D2D2D2 – Base/Disp of Operand 2



Object Instruction Formats

  • Storage to Storage (SS2)

  • General Object Format:

  • OP L1L2 B1D1 D1D1 B2D2 D2D2

  • OP – Operation code

  • L1 – Length of Operand One - Max value 15

  • L2 – Length of Operand Two - Max value 15

  • B1D1D1D1 – Base/Disp of Operand 1

  • B2D2D2D2 – Base/Disp of Operand 2



Object Instruction Formats

  • Register to Register (RR)

  • General Object Format:

  • OP R1R2

  • OP – Operation code

  • R1 – Operand 1 register

  • R2 – Operand 2 register



Object Instruction Formats

  • Storage Immediate (SI)

  • General Object Format:

  • OP II2 B1D1 D1D1

  • OP – Operation code

  • II2 – Immediate Constant – Operand 2

  • B1D1D1D1 – Base/Disp of Operand 1



Object Instruction Formats

  • Register to Indexed Storage (RX)

  • General Object Format:

  • OP R1X2 B2D2 D2D2

  • OP – Operation code

  • R1 – Operand 1 Register

  • X2 – Operand 2 Register

  • B2D2D2D2 – Base/Disp of Operand 2



Object Instruction Formats

  • Register to Storage (RS)

  • General Object Format:

  • OP R1R3 B2D2 D2D2

  • OP – Operation code

  • R1 – Operand 1 Register

  • R3 – Operand 3 Register or Mask

  • B2D2D2D2 – Base/Disp of Operand 2



Explicit Instruction Format

  • Storage to Storage (SS1)

  • Explicit Instruction format

  • OP D1(L1,B1),D2(B2)

  • OP – Operation code

  • D1, D2 – Displacement of operand 1 and 2

  • B1, B2 – Base regs of operand 1 and 2

  • L1 – Length of operand 1- (Max 255 value for 256 bytes)



Explicit Instruction Format

  • Storage to Storage (SS2)

  • Explicit Instruction format

  • OP D1(L1,B1),D2(L2,B2)

  • OP – Operation code

  • D1, D2 – Displacement of operand 1 and 2

  • B1, B2 – Base regs of operand 1 and 2

  • L1 – Length of operand 1 (Max 256)

  • L2 – Length of operand 2 (Max 256)



Explicit Instruction Format

  • Register to Register (RR)



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