Packed field must match the edit “word” X’402020202120’ 5 digits X’4020202021204B2020’ 7 digits X’40202020’ 3 digits
Editing XWORD DC X’40202120’ XPK DS PL2 Move the edit word to the output area (must match the edit word) - XOUT DS CL4
- MVC XOUT,XWORD
Edit the packed field into the output area ED XOUT,XPK
Internal Subroutines BAS R7,SUB … BAS R7,SUB … SUB EQU * ___ ___ ___ BR R7
Practice Exercise #2 Greatest Common Divisor Computation for A and B Let rem = remainder of dividing the larger number by the smaller number Stop if A or B = 0, print A + B. Otherwise go to step 1 Example A B 84 24 12 24 12 0 GCD = 12 + 0 = 12
Practice Exercise #2 Create a file of records with two integers per record stored in a character format in columns 1-8 Print each integer and the gcd. Print one record for each record in the input file
Practice Exercise #3 Read a file that contains 3 5-byte fields in character format (cols 1-5,6-10, 11-15) Call the three fields A, B, C Assume A has 2 decimals, B has 3, and C has 4 For each record in the file, print a record on a report Print A, B, C, A+B, (A+B)/C Don’t divide by 0
Binary Data Binary data is stored in 2’s complement format for signed arithmetic Binary data usually occurs as halfwords, fullwords, and doublewords Data can be defined as binary Some data is binary by nature (addresses)
You might need one of these
Defining Binary Data A DC F’1’ B DC H’-30’ C DC D’50’ D DC B’10100000’ E DC A(B) F DC X’0040’
Converting To Binary
Convert to Binary CVB RX Operand 1 – Register – target Operand 2 – Doubleword in memory – contains packed data Some doubleword values will not fit in a register
CVB Example XPK DC P’70’ DBLWD DS D ZAP DBLDW,XPK CVB R8,DBLWD REG 8 = 00000046
Convert to Decimal CVD RX Operand 1 – Register - Source Operand 2 – Target is a Doubleword in memory – contains packed data afterward Binary data is converted to packed and placed in the doubleword
CVD Example ASSUME R9 = 00000032 DBLWD DS D XPK DS PL3 CVD R9,DBLWD ZAP XPK,DBLWD XPK = 00050C
RX L – Loads a fullword from memory into a register ST – Copies the contents of a register into a fullword in memory Op 1 – a Register Op 2 – a fullword in memory X DS F’20’ Y DS F L R8,X ST R4,Y
RR LR – Load Register LTR – Load and Test Register Both Load the contents of Op-2 into Op-1 LTR sets the condition code Op-1 – a target register Op-2 – a source register
Fullword Halfword Register L LH LR ST STH --- A AH AR S SH SR C CH CR M MH MR D --- DR
Add, Subtract, Compare Fullword RX S - Subtract Fullword C - Compare Fullword Operand 1 – Target Register Operand 2 – Fullword in memory (source)
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