Lecture 7: Instruction Execution Cycle By Noor Kadhum Architecture For 2

Lecture 7: Instruction Execution Cycle

By Noor Kadhum

Architecture For 2^nd class- Computer Dep.

Babylon University -Sciences College For Women

Execution cycle

The execution steps are different from one instruction to another. This depends on the nature of the executed instruction. We can classify the instruction to :

Instruction

The unconditional branching instruction is a change in the

Unconditional branch instruction changes the sequence of execution of the instructions by jumping x steps. This requires to update the value of (PC) by using the following equation:

PC=PC+X

X is available by instruction itself.

Example: draw a diagram to explain the execution cycle of the instruction : JUMP X

As any unconditional instruction, it is all about updating PC by a certain value offered by the instruction using the equation:

PC=PC+X

To do this job, the entries of ALU must be filled by values:

• 
  We don’t need the value (1) so, the carry line remains unset.
  
• 
  Pc and x is distributed on and the direct line
  

Add (activated)

sub

mul

div

Carry =0

(1 = set ,0= reset)

Direct =PC

Z= PC+x

ALU

Y=address of IR (x)

PC

Using ALU to implement unconditional branch instruction

Conditional branch instruction implemented as if it was unconditional in the case of the condition and carried out as if it was sequential if not achieved condition

Example: Draw a diagram to explain the execution cycle of the instruction : Add R1,X

After decoding this instruction the CPU concludes that:

• 
  The content of R1 is already available in the CPU because it is register.
  
• 
  The content of X is resident in the memory , this mean that the value of X should be brought to CPU (i.e. read it),
  

Execution Cycle:

1. 
   Reading the value of address X:
   

3) value of

x

CPU

MEMORY

ALU

4) value

PC

AR

DR

IR

2) address




1) X

2. 
   Implementing the operation :
   

ALU

Y=MDR (value of x)

Carry =0

(1 = set ,0= reset)

Direct =R1


Add (activated)

R1

Z= R1+value( x)

div


mul


sub



Example: Draw a diagram to explain the execution cycle of the instruction : mov x,R1

After decoding this instruction the CPU concludes that:

• 
  The required operation is moving the content of register R1 into memory address (x) i.e. this is a write operation.
  

• 
  The content of R1 is already available in the CPU because it is register.
  

3) value of

R1

CPU

MEMORY

R1

1) value

PC

AR

DR

IR

2) address

(x)

3) address

(x)


Exercise1: What are the detailed steps for the processor to implement the following instructions?

1-Add R2, [X].

2- load X

3- inc

Exercises2: A computer has 4 mathematical operation only (add, sub, mul, div). How to execute the instruction (CMP X,R1) on such computer? write the control sequence for execute cycle for this instruction.

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