Mosfet modeling for rf circuit design Nobuyuki Itoh

MOSFET modeling for RF circuit design

• Nobuyuki Itoh

• Semiconductor Company

• Toshiba Corporation

Recent Progress of MOSFET’s Performance

Contents

VTH based model or Surface potential model

Two types of compact model

Difference btw simulation and measurement(1)

Difference btw simulation and measurement(2)

Basic analog characteristics

VTH based model or Surface potential model

Flicker noise

Flicker Noise due to scaling

Cause of flicker noise degradation

N profile control

Flicker noise

STI stress

STI Stress

gm degradation due to STI stress

Inverter performance due to STI stress

STI stress

Scalable substrate network

Normal BCIM3 model

MOSFET’s Equivalent Circuit for RF

Target Layout

Scalable Model (Lg dependence)

Scalable Model (Wg dependence)

Scalable Model (Vds dependence)

Scalable Model (Vgs dependence)

Scalable substrate network

Thermal noise

Expressions

 vs. Lg

Noise measurement for Sub-0.1-micron NMOS

Measurement data

Empirical formula

Difference between this work and others

How affect to circuit performance estimation

VCO noise expression

Bipolar VCO

Comparison of VCO noises

Summary

• Surface potential model seems better than VTH based model for analog circuit design due to its continuous characteristics. It needs entire discussion which model has to be chosen.

• Scalable substrate network model has already been realized for limited layout. But it might be need more layout freedom.

• Flicker noise increasing of SiON gate insulator is problems for performance. But accuracy of model is not issue.

• STI stress model has been not popular, yet. We need more experience.

• Thermal noise model is still issue.  is increasing due to scaling. It is the one of most important issues for RF analog designe.

Acknowledgments

References