Device-dependent
Information
DSP56300 Information
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DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA_DSP_ASSEMBLER_REFERENCE_MANUAL_F-27_F.6__DSP56800_INFORMATION'>MOTOROLA
F.5.3 Condition Code Mnemonics
Following are the DSP56300 condition code mnemonics which correspond to the condi-
tional instructions based on the CCR condition codes. These tests may be used in an op-
erand comparison expression within a structured control statement (Chapter 7).
<
CC>
— carry clear
<
CS>
— carry set
<
EC>
— extension clear
<
EQ>
— equal
<
ES>
— extension set
<
GE>
— greater or equal
<
GT>
— greater than
<
HS>
— higher or same
<
LC>
— limit clear
<
LE>
— less or equal
<
LO>
— lower
<
LS>
— limit set
<
LT>
— less than
<
MI>
— minus
<
NE>
— not equal
<
NN>
— not normalized
<
NR>
— normalized
<
PL>
— plus
Device-dependent Information
DSP56800 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-27
F.6
DSP56800 INFORMATION
The Motorola DSP56800 refers to a family of high-speed, low power programmable
CMOS processors. The DSP56800 supports16-bit signed fixed-point fractional and
signed and unsigned integer arithmetic.
F.6.1 Instruction Set Summary
DSP56800 instructions can be grouped by function into six types:
1. Arithmetic instructions
2. Logical instructions
3. Bit manipulation instructions
4. Loop instructions
5. Move instructions
6. Program
control instructions
Device-dependent Information
DSP56800 Information
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DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA
F.6.1.1
Arithmetic Instructions
The DSP56800 instructions used for arithmetic operations are:
ABS
— Absolute value*
ADC
— Add long with carry
ADD
— Add*
ASL
— Arithmetic shift accumulator left*
ASLL
— Multi-bit arithmetic left shift
ASR
— Arithmetic shift accumulator right*
ASRAC
— Arithmetic right shift with accumulate
ASRR
— Multi-bit arithmetic right shift
CLR
— Clear accumulator*
CMP
— Compare*
DEC(W)
— Decrement word*
DIV
— Divide iteration
IMPY(16)
—
Integer multiply
INC(W)
— Increment word*
MAC
— Multiply-accumulate*
MACR
— Multiply-accumulate and round*
MACSU
— Signed/unsigned multiply-accumulate
MPY
— Signed multiply*
MPYR
— Signed multiply and round*
MPYSU
— Signed/unsigned multiply
NEG
— Negate accumulator*
NORM
— Normalize accumulator iteration
RND
— Round accumulator*
SBC
— Subtract long with carry
SUB
— Subtract*
Tcc
— Transfer conditionally
TFR
— Transfer data ALU register*
TST
— Test accumulator*
TSTW
— Test register or memory
*Instruction allows parallel data move.
Device-dependent Information
DSP56800 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-29
F.6.1.2
Logical Instructions
The DSP56800 instructions used for logical operations are:
AND
— Logical AND
ANDC
— AND Immediate with control register
EOR
— Logical exclusive OR
EORC
— Logical exclusive OR immediate
LSL
— Logical shift left
LSLL
— Multi-bit logical shift left
LSR
— Logical shift right
LSRAC
— Logical shift right with accumulate
LSRR
—
Multi-bit logical shift right
NOT
— Logical complement on accumulator
NOTC
— Logical complement on accumulator with carry
OR
— Logical inclusive OR
ORC
— OR immediate with control register
ROL
— Rotate accumulator left*
ROR
— Rotate accumulator right*
F.6.1.3
Bit Manipulation Instructions
The DSP56800 instructions used for bit manipulation are:
BFCHG
— Test bit field and change
BFCLR
— Test bit field and clear
BFSET
— Test bit field and set
BFTSTH
— Test bit field high
BFTSTL
—
Test bit field low
F.6.1.4
Loop Instructions
The DSP56800 instructions used for loop operations are:
DO
— Start hardware DO loop
ENDDO
— End current DO loop
*Instruction allows parallel data move.
Device-dependent Information
DSP56800 Information
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DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA
F.6.1.5
Move Instructions
The DSP56800 instructions used for move operations are:
LEA
— Load effective address
MOVE
— Move data*
MOVEC
— Move control register
MOVEI
—
Move immediate
MOVEM
— Move program memory
MOVEP
— Move peripheral data
MOVES
— Move absolute short
POP
— Pop from stack
F.6.1.6
Program Control Instructions
The DSP56800 instructions used for program control are:
Bcc
— Branch conditionally
BRA
— Branch always
BRCLR
— Branch if bits clear
BRSET
—
Branch if bits set
DEBUG
— Enter debug mode
ILLEGAL
— Illegal instruction interrupt
Jcc
— Jump conditionally
JMP
— Jump
JSR
— Jump to subroutine
NOP
— No operation
REP
— Repeat next instruction
RTI
— Return from interrupt
RTS
— Return from subroutine
STOP
— Stop instruction processing (low power standby)
SWI
—
Software interrupt
WAIT
— Wait for interrupt (low power standby)
*Instruction allows parallel data move.
