Threshold Voltage Pinning- high-K and Polysilicon gate are incompatible due to Fermi level pinning at the High-K and Polysilicon interface which causes high threshold voltages in transistors
Phonon scattering - High-K/ Polysilicon transistors exhibit severely degraded channel mobility due to the coupling of phonon modes in high-K to the inversion channel charge carriers.
Integration of more than 400 million transistors for dual-core processors and more than 800 million for quad-core in Intel® 45nm high-k metal gate silicon technology.