GUIDE, Apr 2018, Version 2018.1
2
www.cobham.com/gaisler
LEON/GRLIB Guide
Table of contents
1
Introduction............................................................................................................. 4
1.1
Overview ............................................................................................................................. 4
1.2
Other Resources .................................................................................................................. 4
1.3
Licensing ............................................................................................................................. 4
2
System Design Guidelines ...................................................................................... 5
2.1
Introduction ......................................................................................................................... 5
2.2
Minimal System .................................................................................................................. 5
2.3
Memory Map....................................................................................................................... 5
2.3.1
Overview............................................................................................................... 5
2.3.2
Typical LEON/GRLIB Memory Map................................................................... 6
2.3.3
Memory Map in Systems That Need 2 GiB Memory Area .................................. 7
2.3.4
AHB I/O Area and GRLIB Plug&Play Areas....................................................... 7
2.4
Interrupt Assignments.......................................................................................................... 7
2.4.1
Overview............................................................................................................... 7
2.4.2
Linux 2.6 and later ................................................................................................ 8
2.4.3
RTEMS ................................................................................................................. 8
2.4.4
VxWorks ............................................................................................................... 8
2.5
Device Specific Identification ............................................................................................. 8
3
LEON design information....................................................................................... 9
3.1
Introduction ......................................................................................................................... 9
3.2
General Recommendations.................................................................................................. 9
3.2.1
Data Cache Snooping............................................................................................ 9
3.2.2
V7 and FPU........................................................................................................... 9
3.2.3
MMU and Supervisor Tag bit ............................................................................... 9
3.3
LEON Example Configurations .......................................................................................... 9
3.3.1
Overview............................................................................................................... 9
3.3.2
Minimal LEON Configuration............................................................................ 10
3.3.3
General Purpose LEON Configuration ............................................................... 11
3.3.4
High Performance LEON Configuration ............................................................ 11
3.3.5
Configuration Settings For Existing LEON Devices.......................................... 13
3.4
LEON subsystem (gaisler.subsys.leon_dsu_stat_base)..................................................... 13
4
Multiple Buses, Clock Domains and Clock Gating .............................................. 14
4.1
Introduction ....................................................................................................................... 14
4.2
Creating Multi-Bus Systems ............................................................................................. 14
4.2.1
Overview............................................................................................................. 14
4.2.2
GRLIB Facilities ................................................................................................. 14
4.2.3
GRLIB AMBA Plug&Play in Multi-Bus Systems.............................................. 14
4.2.4
Buses in Different Clock Domains ..................................................................... 15
4.2.5
Single AHB Bus Example................................................................................... 15
4.2.6
Multi-Bus System Example ................................................................................ 15
4.3
LEON3 Double-Clocking.................................................................................................. 16
4.3.1
Overview............................................................................................................. 16
4.3.2
LEON3-CLK2X Template Design...................................................................... 16
4.3.3
Clocking.............................................................................................................. 16
4.3.4
Multicycle Paths.................................................................................................. 17
4.3.5
Dynamic Clock Switching .................................................................................. 19
4.3.6
Configuration ...................................................................................................... 19
4.4
Clock gating ...................................................................................................................... 19
4.4.1
Overview............................................................................................................. 19
4.4.2
LEON clock gating ............................................................................................. 19