Device-dependent
Information
DSP96000 Information
F-14
DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA
F.3.3 Condition Code Mnemonics
Following are the DSP96000 condition code mnemonics which correspond to the condi-
tional instructions based on the CCR condition codes. These tests may be used in an op-
erand comparison expression within a structured control statement (Chapter 7).
<
CC>
— carry clear
<
CS>
— carry set
<
EQ>
— equal
<
FEQ>
— float equal
<
FERR>
— float error
<
FGE>
— float greater or equal
<
FGL>
— float
greater or less than
<
FGLE>
— float greater, less, or equal
<
FGT>
— float greater than
<
FINF>
— float infinity
<
FLE>
— float less or equal
<
FLT>
— float less than
<
FMI>
— float minus
<
FNE>
— float
not equal
<
FNGE>
— float not greater or equal
<
FNGL>
— float not greater or less than
<
FNGLE>
— float not greater, less, or equal
<
FNGT>
— float not greater than
<
FNLT>
— float not less than
<
FOR>
— float
ordered
<
FPL>
— float plus
<
FUN>
— float unordered
<
GE>
— greater or equal
<
GT>
— greater than
<
HI>
— higher
<
HS>
— higher or same
<
LE>
— less or equal
<
LO>
— lower
<
LS>
— lower or same
<
LT>
— less than
<
MI>
— minus
<
NE>
— not equal
<
PL>
— plus
<
VC>
— overflow clear
<
VS>
— overflow set
Device-dependent Information
DSP56100 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-15
F.4
DSP56100 INFORMATION
The Motorola DSP56100 refers to a family of high-speed, low power programmable
CMOS processors. The DSP56100 supports16-bit signed fixed-point fractional and
signed and unsigned integer arithmetic.
F.4.1 Instruction Set Summary
DSP56100 instructions can be grouped by function into six types:
1. Arithmetic
instructions
2. Logical instructions
3. Bit manipulation instructions
4. Loop instructions
5. Move instructions
6. Program control instructions
F.4.1.1
Arithmetic Instructions
The DSP56100 instructions used for arithmetic operations are:
ABS
— Absolute value*
ADC
— Add long with carry
ADD
— Add*
ASL
— Arithmetic shift accumulator left*
ASL4
— 4-bit arithmetic
shift accumulator left
ASR
— Arithmetic shift accumulator right*
ASR4
— 4-bit arithmetic shift accumulator right
ASR16
— 16-bit arithmetic shift accumulator right
CLR
— Clear accumulator*
CLR24
— Clear 24 MS bits of accumulator*
CMP
— Compare*
CMPM
— Compare magnitude*
DEC
— Decrement accumulator*
DEC24
— Decrement 24 MS bits of accumulator*
DIV
— Divide iteration
DMAC
— Multiply-accumulate with 16-bit right shift
EXT
— Sign extend accumulator
IMAC
— Integer multiply-accumulate
IMPY
—
Integer multiply
INC
— Increment accumulator*
*Instruction allows parallel data move.
Device-dependent Information
DSP56100 Information
F-16
DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA
INC24
— Increment 24 MS bits of accumulator*
MAC
— Signed multiply-accumulate*
MACR
— Signed multiply-accumulate and round*
MACSU
— Signed/unsigned multiply-accumulate
MACUU
— Unsigned multiply-accumulate
MPY
— Signed multiply*
MPYR
— Signed multiply and round*
MPYSU
— Signed/unsigned multiply
MPYUU
—
Unsigned multiply
NEG
— Negate accumulator
NEGC
— Negate accumulator with carry*
NORM
— Normalize accumulator iteration
RND
— Round accumulator*
SBC
— Subtract long with carry*
SUB
— Subtract*
SUBL
— Shift left then subtract*
SWAP
— Swap accumulator words
Tcc
— Transfer conditionally
TFR
— Transfer data ALU register*
TFR2
— Transfer data ALU register
TFR3
— Transfer data ALU register
TST
— Test accumulator*
TST2
— Test data ALU register*
ZERO
— Zero extend accumulator
F.4.1.2
Logical Instructions
The DSP56100 instructions used for logical operations are:
AND
— Logical AND*
ANDI
— AND Immediate with control register
EOR
— Logical exclusive OR*
LSL
— Logical shift accumulator left*
LSR
— Logical shift accumulator right*
NOT
— Logical complement on accumulator*
OR
— Logical inclusive OR*
ORI
— OR immediate with control register
ROL
— Rotate accumulator left*
ROR
— Rotate accumulator right*
*Instruction allows parallel data move.