Motorola dsp assembler Reference Manual



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Device-dependent Information
DSP56300 Information
F-22
DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA_DSP_ASSEMBLER_REFERENCE_MANUAL_F-23_F.5.1.4__Loop_Instructions'>MOTOROLA
Tcc
— Transfer conditionally
TFR
— Transfer data ALU register*
TST
— Test*
F.5.1.2
  Logical Instructions
The DSP56300 instructions used for logical operations are:
AND
— Logical AND*
ANDI
— AND Immediate with control register
CLB
— Count leading bits
EOR
— Logical exclusive OR*
EXTRACT
— Extract bit field
EXTRACTU
— Extract unsigned bit field
INSERT
INsert bit field
LSL
— Logical shift accumulator left*
LSR
— Logical shift accumulator right*
MERGE
— Merge two half words
NOT
— Logical complement on accumulator*
OR
— Logical inclusive OR*
ORI
— OR immediate with control register
ROL
— Rotate accumulator left*
ROR
— Rotate accumulator right*
F.5.1.3
  Bit Manipulation Instructions
The DSP56300 instructions used for bit manipulation are:
BCHG
— Bit test and change
BCLR
— Bit test and clear
BSET
— Bit test and set
BTST
— Bit test on memory
*Instruction allows parallel data move.


Device-dependent Information
DSP56300 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-23
F.5.1.4
  Loop Instructions
The DSP56300 instructions used for loop operations are:
BRKcc
— Conditionally exit from hardware loop
DO
— Start hardware loop
DO FOREVER
— Start infinite hardware loop
DOR
— Start PC-relative hardware loop
DOR FOREVER
— Start infinite PC-relative hardware loop
ENDDO
— Exit from hardware loop
F.5.1.5
  Move Instructions
The DSP56300 instructions used for move operations are:
LRA
Load PC-relative address
LUA
— Load updated address
MOVE
— Move data*
MOVEC
— Move control register
MOVEM
— Move program memory
MOVEP
— Move peripheral data
*Instruction allows parallel data move.


Device-dependent Information
DSP56300 Information
F-24
DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA
F.5.1.6
  Program Control Instructions
The DSP56300 instructions used for program control are:
Bcc
Branch conditionally
BRA
— Branch
BRCLR
— Branch if bit clear
BRSET
— Branch if bet set
BScc
— Branch to subroutine conditionally
BSCLR
— Branch to subroutine if bit clear
BSR
— Branch to subroutine
BSSET
— Branch to subroutine if bit set
DEBUG
— Enter debug mode
DEBUGcc
— Enter debug mode conditionally
IFcc
— Execute conditionally
IFcc.U
— Execute conditionally and update CCR
Jcc
— Jump conditionally
JCLR
— Jump if bit clear
JMP
— Jump
JScc
— Jump to subroutine conditionally
JSCLR
— Jump to subroutine if bit clear
JSET
— Jump if bit set
JSSET
Jump to subroutine if bit set
JSR
— Jump to subroutine
NOP
— No operation
PFLUSH
— Flush program cache
PFLUSHUN
— Flush program cache unlocked
PFREE
— Free program cache
PLOCK
— Program cache sector lock
PLOCKR
— Program cache relative sector lock
PUNLOCK
— Program cache sector unlock
PUNLOCKR
— Program cache relative sector unlock
REP
Repeat next instruction
RESET
— Reset on-chip peripheral devices
RTI
— Return from interrupt
RTS
— Return from subroutine
STOP
— Stop processing (low power standby)
TRAP
— Software trap
TRAPcc
— Trap conditionally
WAIT
— Wait for interrupt (low power standby)


Device-dependent Information
DSP56300 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-25
F.5.2   Register Names and Usage
The following DSP56300 register names, in either upper or lower case, cannot be used
as symbol names in an assembly language source file:
X
A
AB
X0
A0
BA
X1
A1
A10
Y
B
B10
Y0
B0
A2
Y1
B1
B2
R0
N0
M0
MR
EP
R1
N1
M1
CCR VBA
R2
N2
M2
SR
SC
R3
N3
M3
LC
SZ
R4
N4
M4
LA
COM
R5
N5
M5
SSH
EOM
R6
N6
M6
SSL
R7
N7
M7
OMR
The following DSP56300 registers are used by the assembler in structured control state-
ment processing (Chapter 7):
A
X0
Y0


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