The mips 32 An Aside: Breadboards in the Lab

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The MIPS 32

An Aside: Breadboards in the Lab

  • We have breadboards (one per group) and lockers in the lab for you to keep projects that need to remain set up for a “reasonable” period of time. Breadboards are not to leave the lab.

  • You must return chips to the proper bins expeditiously so that there are enough chips for all to use. At the end of the quarter all boards must be cleaned up before grades can be issued.

  • When you want to “keep” a breadboard with chips on it, put the breadboard in a locker and put your names on a “sticky” on the outside of the locker. I prefer you not put a lock on the locker unless you have some of your own equipment/supplies in it. Breadboards without names on the locker may be confiscated.

MIPS (RISC) Design Principles

  • Simplicity favors regularity

    • fixed size instructions – 32-bits
    • small number of instruction formats
    • opcode always the first 6 bits
  • Good design demands good compromises

    • three instruction formats
  • Smaller is faster

  • Make the common case fast

    • arithmetic operands from the register file (load-store machine)
    • allow instructions to contain immediate operands

MIPS Organization

MIPS R3000 Instruction Set Architecture (ISA)

  • Instruction Categories

    • Computational
    • Load/Store
    • Jump and Branch
    • Floating Point
      • coprocessor
    • Memory Management
    • Special

MIPS Addressing Modes

MIPS Register Convention

Why use Assembly Language Programing ?

  • When speed is critical. Maybe use Assembly Language for critical components.

  • To exploit specialized machine capabilities.

  • When no High Lever Language compiler is available for a machine.

  • When one wants to debug particularly complex structures.

  • Why not:

  • Inherently machine dependent.

  • Assembly Language programs are much longer.

  • Assembly Language programs tend to be harder to debug.

  • Abstraction level is much lower that with a High Level Language.

SPIM Simulator (

A MIPS Sample Program

Homework 2

  • Analyze MIPS program

  • Write MIPS program

  • Use SPIM simulator

  • Look at MIPS Context Frames

Supporting Procedures

  • Process:

  • Place parameters where procedure can access them

  • Transfer control to the procedure

  • Acquire storage resources for the procedure

  • Perform the task

  • Place result where calling program can access it

  • Return control to calling program

  • Support structure:

  • $a0-$a3 argument passing registers

  • $v0-$v1 return value registers

  • $ra return address register

Procedure Call Convention

MIPS 32 Context Frames

Calling Procedure: Spilling Registers

  • What if the callee needs more registers? What if the procedure is recursive?

    • uses a stack – a last-in-first-out queue – in memory for passing additional values or saving (recursive) return address(es)

MIPS Arithmetic Instructions

  • MIPS assembly language arithmetic statement

  • add $t0, $s1, $s2

  • sub $t0, $s1, $s2

MIPS Arithmetic Instructions

  • MIPS assembly language arithmetic statement

  • add $t0, $s1, $s2

  • sub $t0, $s1, $s2

Machine Language - Add Instruction

  • Instructions, like registers and words of data, are 32 bits long

  • Arithmetic Instruction Format (R format):

  • add $t0, $s1, $s2

MIPS Immediate Instructions

  • addi $sp, $sp, 4 #$sp = $sp + 4

  • slti $t0, $s2, 15 #$t0 = 1 if $s2<15

  • Machine format (I format):

How About Larger Constants?

  • We'd also like to be able to load a 32 bit constant into a register, for this we must use two instructions

  • a new "load upper immediate" instruction

  • lui $t0, 1010101010101010

  • Then must get the lower order bits right, use ori $t0, $t0, 1010101010101010

MIPS Memory Access Instructions

  • MIPS has two basic data transfer instructions for accessing memory

  • lw $t0, 4($s3) #load word from memory

  • sw $t0, 8($s3) #store word to memory

  • The data is loaded into (lw) or stored from (sw) a register in the register file – a 5 bit address

  • The memory address – a 32 bit address – is formed by adding the contents of the base address register to the offset value

    • A 16-bit field meaning access is limited to memory locations within a region of 213 or 8,192 words (215 or 32,768 bytes) of the address in the base register
    • Note that the offset can be positive or negative

Machine Language - Load Instruction

  • Load/Store Instruction Format (I format):

  • lw $t0, 24($s2)

Byte Addresses

  • Since 8-bit bytes are so useful, most architectures address individual bytes in memory

    • The memory address of a word must be a multiple of 4 (alignment restriction)
  • Big Endian: leftmost byte is word address

      • IBM 360/370, Motorola 68k, MIPS, Sparc, HP PA
  • Little Endian: rightmost byte is word address

      • Intel 80x86, DEC Vax, DEC Alpha (Windows NT)

Loading and Storing Bytes

  • MIPS provides special instructions to move bytes

  • lb $t0, 1($s3) #load byte from memory

  • sb $t0, 6($s3) #store byte to memory

MIPS Control Flow Instructions

  • MIPS conditional branch instructions:

  • bne $s0, $s1, Lbl #go to Lbl if $s0$s1 beq $s0, $s1, Lbl #go to Lbl if $s0=$s1

    • Ex: if (i==j) h = i + j;
  • bne $s0, $s1, Lbl1 add $s3, $s0, $s1 Lbl1: ...

Specifying Branch Destinations

  • Use a register (like in lw and sw) added to the 16-bit offset

    • which register? Instruction Address Register (the PC)
      • its use is automatically implied by instruction
      • PC gets updated (PC+4) during the fetch cycle so that it holds the address of the next instruction
    • limits the branch distance to -215 to +215-1 instructions from the (instruction after the) branch instruction, but most branches are local anyway

Other Control Flow Instructions

  • MIPS also has an unconditional branch instruction or jump instruction: j label #go to label

Branching Far Away

  • What if the branch destination is further away than can be captured in 16 bits?

Instructions for Accessing Procedures

  • MIPS procedure call instruction: jal ProcedureAddress #jump and link

  • Saves PC+4 in register $ra to have a link to the next instruction for the procedure return

  • Machine format (J format):

  • Then can do procedure return with a

  • jr $ra #return

  • Instruction format (R format):

MIPS ISA – First look

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