The mips architecture Instructions are 32 bit, stored as binary numbers

The MIPS Architecture

Instructions are 32 bit, stored as binary numbers

Simplified Datapath diagram

Actual Datapath diagram (sneak preview of Ch. 10 in our text)

The bigger picture from Chapter 10 …

Components connected via buses (32 bits)

Triangles are multiplexers, that are used as data selectors to choose between datapaths. The control logic makes these selections (covered in 2^nd half of course).

Register File: similar to memory on a calculator. 32 registers, each with 32 bits (see MIPS Quick Tutorial for more details)

Instruction Register: Can be interpreted in 3 different ways:

Register format

Op-Code__Rs__Rt__Rd'>Op-Code	Rs	Rt	Rd		Function Code
000000	sssss	ttttt	ddddd	00000	ffffff

Rd is destination and Rs and Rt are source registers

Function Code (last 6 bits) specifies what instruction should be executed

Immediate format

Op-Code	Rs	Rt	Immediate
ffffff	sssss	ttttt	iiiiiiiiiiiiiiii

Opcode field specifies instruction to be executed

Rs is source for fetch, Rt is destination register

Last 16 bits are a constant binary value

Branch, Load, and Store instructions use this format

Jump Instruction

Op-Code	Target
00001f	tttttttttttttttttttttttttt

Opcode specifies a jump, essentially a “GoTo”

Target is low-order 26 bits, which is location in memory to which to jump for next instruction.