Cse 230: Computer Organization Quiz 1

Name ___________________________
CSE 230: Computer Organization

Quiz - Chapter 2, Feb 9, 2006 (updated)

1. 
   A processor with a MIPS-like architecture may require four instructions to perform a simple addition that takes only one command in C (eg. A = B + C;). Sketch the assembly code. (Don’t worry about minor syntax errors.)
   

2. 
   Which of the following would be typical of machine language instructions and which of high level instructions (as in C)? Mark ‘M’ for machine and/or ‘C’ for high level.
   

1. 
   If (test) then {block}; else {block};
   
2. 
   Load reg5, score1
   
3. 
   X = A * B - 100;
   
4. 
   While (test) do {block};
   
5. 
   Add reg3, reg1, reg2
   
6. 
   Jump next
   

3. 
   A hypothetical processor has 4096 general purpose registers, though only 32 of them can be accessed at any one time. A special “register block” register holds the index of the beginning of the currently accessible 32 register block. All instructions that access registers automatically use this special register. What would be the advantage of automatically adding/subtracting 16 from this register when calling/returning from procedures? (Hint: registers 16-31 before a call in effect become registers 0-15 during the procedure. How might a programmer make use of these registers?)
   

4. 
   In some processors the PC is a general purpose register and there are no explicit branch or jump instructions. How might jumping be done?
   

5. 
   A command encoding scheme includes an additional “indirect” bit every time a register is specified. When the bit is 0, the contents of the associated register are intended to be used. When the bit is 1, the contents of the register is treated as a memory address of the actual data. Assuming there are 8 general registers and an add instruction is 16 bits long, has a 4 bit op code, and refers to 3 registers (2 for the addends and 1 for the sum), show a possible layout of an add command (with op code 0000₂) that sums register 5 and a memory location (that is specified in register 6) and places the result in register 7.
   

_0_ _0_ _0_ _0_|___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___

6. 
   Consider the following code that involves jr (jump register) and j (jump). What sections of code are reached if register $1 initially contains a 1? 2? 3? Explain! What high level programming structure could this code be used to implement?
   

sll $1, $1, 2

addi $1, $1, Here # assume we can do this

Here: jr $1

j Tic

j Tac

j Toe

Tic: … # this is a whole chunk of code

Tac: … # this is another chunk of code

Toe: … # this is still another chunk of code

7. 
   Consider a stack machine with these instructions (same as in homework):
   

push immediate (obvious)

pop (pop top of stack and discard)

add (pop top of stack, pop next to top of stack, add, push result onto stack)

sub (pop top of stack, pop next to top of stack, subtract first from second,

push result onto stack)

div (pop top of stack, pop next to top of stack, divide second by the first,

push quotient, then the remainder onto stack)

mult (pop top of stack, pop next to top of stack, multiply, push result onto

stack)

copy n (push a copy of the nth item on the stack to the top of the stack)

output (pop and print the top of the stack)

bz PC relative addr (branch to addr if the top of the stack is 0)

bnz PC relative addr (branch to addr if the top of the stack is not 0)

pick n (remove the nth value on the stack, and push it onto the top of the stack)
note: Current top of stack is index number ‘1’ for copy and pick.

Write a function that returns the nth Fibonacci number. Assume n comes in on top of the stack and that the answer is returned on top of the stack with the rest of the stack unchanged. Note: The first few Fibonacci numbers are 1, 1, 2, 3, 5, 8, 13, 21. Inputting 4 should return 3.

8. 
   Which of the following assembly language instructions (possibly expanded from pseudoinstructions) will need to be targeted for relocation by the linker? Explain.
   

1. 
   lw $s3, 8($sp)
   
2. 
   bne $t0, $zero, exit2
   
3. 
   jal swap
   
4. 
   li $t1, 8
   
5. 
   li $t2, width
   

9. 
   Consider an accumulator based machine with the following commands. Give the code to compute the expression (4 * 3) + (7 / 2) * ((8 – 6) / (4 * 3)). Leave the answer in the accumulator. Keep in mind that there are no general registers available for temporary storage. Minimize the number of memory references. Hint: You are allowed to evaluate the expression in any order of operations that you wish.
   

ClearAcc

Add immediate

Add address

Sub immediate

Sub address

Mpy immediate

Mpy address

Div immediate

Div address

Load address

Store address