Device-dependent
Information
DSP96000 Information
F-10
DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA_DSP_ASSEMBLER_REFERENCE_MANUAL_F-11_F.3.1.5__Move_Instructions'>MOTOROLA
F.3.1.2
Logical Instructions
The DSP96000 instructions used for logical operations are:
AND
— Logical AND*
ANDC
— Logical AND with complement*
ANDI
— AND Immediate to control register
EOR
— Logical exclusive OR*
LSL
— Logical shift left*
LSR
— Logical shift right*
NOT
— Logical complement*
OR
— Logical inclusive OR*
ORC
— Logical inclusive OR with complement*
ORI
— OR immediate with control register
ROL
— Rotate left*
ROR
— Rotate right*
F.3.1.3
Bit Manipulation Instructions
The DSP96000 instructions used for bit manipulation are:
BCHG
— Bit test and change
BCLR
— Bit test and clear
BSET
—
Bit test and set
BTST
— Bit test on memory
F.3.1.4
Loop Instructions
The DSP96000 instructions used for loop operations are:
DO
— Start hardware loop
DOR
— Start PC-relative hardware loop
ENDDO
— Exit from hardware loop
*Instruction allows parallel data move.
Device-dependent Information
DSP96000 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-11
F.3.1.5
Move Instructions
The DSP96000 instructions used for move operations are:
FTFR
— Transfer floating point data ALU register
LEA
— Load effective address
LRA
— Load PC-relative address
MOVE
— Move data*
MOVEC
— Move control register
MOVEI
— Move immediate short
MOVEM
—
Move program memory
MOVEP
— Move peripheral data
MOVES
— Move absolute short
MOVETA
— Move data registers and test address*
TFR
— Transfer data ALU register*
*Instruction allows parallel data move.
Device-dependent Information
DSP96000 Information
F-12
DSP ASSEMBLER REFERENCE MANUAL
MOTOROLA
F.3.1.6
Program Control Instructions
The DSP96000 instructions used for program control are:
Bcc
— Branch conditionally
BRA
—
Branch always
BRCLR
— Branch if bit clear
BRSET
— Branch if bit set
BScc
— Branch to subroutine conditionally
BSCLR
— Branch to subroutine if bit clear
BSR
— Branch to subroutine
BSSET
— Branch to subroutine if bit set
DEBUGcc
— Enter
debug mode conditionally
FBcc
— Floating point branch conditionally
FBScc
— Floating point branch to subroutine conditionally
FDEBUGcc
— Enter debug mode conditionally
FJcc
— Floating point jump conditionally
FJScc
— Floating point jump to subroutine conditionally
FTRAPcc
— Floating point conditional software interrupt
ILLEGAL
—
Illegal instruction interrupt
Jcc
— Jump conditionally
JCLR
— Jump if bit clear
JMP
— Jump
JScc
— Jump to subroutine conditionally
JSCLR
— Jump to subroutine if bit clear
JSET
— Jump if bit set
JSR
— Jump to subroutine
JSSET
—
Jump to subroutine if bit set
NOP
— No operation
PFLUSH
— Flush program cache
PFREE
— Free program cache
PLOCK
— Program cache sector lock
PLOCKR
— Program cache relative sector lock
PUNLOCK
— Program cache sector unlock
PUNLOCKR
— Program cache relative sector unlock
REP
— Repeat next instruction
RESET
— Reset
on-chip peripheral devices
RTI
— Return from interrupt
RTR
— Return from subroutine with restore
RTS
— Return from subroutine
STOP
— Stop processing (low power standby)
Device-dependent Information
DSP96000 Information
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
F-13
WAIT
— Wait for interrupt (low power standby)
F.3.2 Register Names and Usage
The following DSP96000 register names, in either upper or lower case, cannot be used
as symbol names in an assembly language source file:
D0
D0.L D0.M D0.H
D1
D1.L D1.M D1.H
D2
D2.L D2.M D2.H
D3
D3.L D3.M D3.H
D4
D4.L D4.M D4.H
D5
D5.L D5.M D5.H
D6
D6.L D6.M D6.H
D7
D7.L D7.M D7.H
D8
D8.L D8.M D8.H
D9
D9.L D9.M D9.H
R0
N0
M0
MR
R1
N1
M1
CCR
R2
N2
M2
SR
R3
N3
M3
LC
R4
N4
M4
LA
R5
N5
M5
SSH
R6
N6
M6
SSL
R7
N7
M7
OMR
The following DSP96000 registers are used by the Assembler in structured control state-
ment processing (Chapter 7):
D0.L D0.M D4.L D6.L
