Flip-Flops Basic concepts

Flip-Flops

• Basic concepts

Flip-Flops

• A flip-flop is a bi-stable device: a circuit having 2 stable conditions (0 or 1)

• 3 classes of flip-flops

• latches: outputs respond immediately while enabled (no timing control)
• pulse-triggered flip-flops: outputs response to the triggering pulse
• edge-triggered flip-flops: outputs responses to the control input edge

Conventions

• The circuit is set means output = 1

• The circuit is reset means output = 0

• Flip-flops have two output Q and Q’ or (Q and Q)

• Due to time related characteristic of the flip-flop, Q and Q’ (or Q) are usually represented as followed:

• Qt or Q: present state
• Qt+1 or Q+: next state

4 Types of Flip-Flops

• SR flip-flop JK flip-flop

• D flip-flop T flip-flop

SR Latch

• An SR (or set-reset) latch consists of

• S (set) input: set the circuit
• R (reset) input: reset the circuit
• Q and Q’ output: output of the SR latch in normal and complement form
• Application example: a switch debouncer

Timing Consideration

• When using a real flip-flop, the following information is needed to be considered:

• propagation delay (tpLH, tpHL) - time needed for an input signal to produce an output signal
• minimum pulse width (tw(min)) - minimum amount of time a signal must be applied
• setup and hold time (tsu, th) - minimum time the input signal must be held fixed before and after the latching action

Asynchronous Inputs

• do not require the presence of a control signal

• preset (PR) - set the flip-flop
• clear (CLR) - reset the flip-flop

• useful to bring a flip-flop to a desired initial state

Characteristic Equations

• algebraic descriptions of the next-state table of a flip-flop

• constructing from the Karnaugh map for Qt+1 in terms of the present state and input