Assembler Concepts Copyright 2008 by David Woolbright

The fullword is added to, or subtracted from, the contents of the register

For COMPARE, the contents are arithmetically compared

Add and Subtract Fullword, Halfword

Multiply Fullword

Divide Fullword

Add and Subtract Register

• RR

• AR – Add Register

• SR – Subtract Register

• Op-1 – Target Register

• Op-2 – Source Register

• X DS F

• Y DS F

• L R8,X

• L R9,Y

• AR R8,R9

Alignment

• Doubleword, Fullword and Halfword alignment can be provided to a field:

• DS 0D Doubleword alignment

• X DS ….

• DS 0F Fullword alignment

• Y DS ….

• DS 0H Halfword alignment

• Z DS ….

Alignment

• Forced alignment can be prevented by coding a length for halfwords, fullwords and doublewords:

• DS 0F

• X DS CL1

• Y DS FL4

• Z DS HL2

Practice Exercise 4

• Create a file of records

• Each record contains three integers

• Field A – columns 1-5 - zoned

• Field B – columns 6-7 – packed

• Field C – columns 8-11 – fullword

• Align the first byte of the record on a doubleword

• Print A, B, C, A+B, (A * B)/ C

• Do all the work as plain integer arithmetic in the registers

Load Address

• RX

• LA - Load address

• Op1 – the target register

• Op2 – a fullword in memory. The address of the memory location is copied into the register

Load and Load Address

Branch on Count

• BCT

• RX

• Used to create counted loops with binary values

• Op 1 – a register containing a count

• Op 2 – a label of an instruction that is the target of a branch

• The register is decremented by 1. If the result is not zero, a branch occurs to the address indicated by Op 2. Otherwise, no branch occurs.

Counted Binary Loops

• L R9,COUNT

• LA R8,TABLE

• LOOP EQU *

• MVC NAMEO,NAME

• BCT R9,LOOP

• …

• COUNT DC F’30’

Branch on Count Register

• RX

• BCTR

• Op 1 – a register with a count field

• Op 2 – a register containing an address to branch to

• Op 1 is decremented, if the result is not zero, the branch occurs. Otherwise execution continues with the next instruction

• If Op 2 is specified as R0, no branch is taken, and execution continues with the next instruction

Edit and Mark

• EDMK

• Similar to Ed

• If significance starts because a significant digit was encountered, R1 points at the significant digit

• If the significance starter causes significance to start, R1 is unchanged

EDMK Example

• EDWD DC X’402020202120’

• AMTPK DS PL3

• AMTO DS 0CL6

• DS CL5

• AMTOLB DS CL1

• LA R1,AMTOLB

• MVC AMTO,EDWD

• EDMK AMTO,AMTPK

• BCTR R1,R0

• MVI 0(R1),C’-’

Typical Table

• TABLE EQU *

• TABREC DS 0CL8

• QTYA DS F’90’

• QTYB DS F’30’

• RECEND EQU *

• DC F’30’

• DC F’20’

• DS F’66’

• DS F’39’

• TABEND EQU *

• RECLEN DC A(RECEND-TABLE)

• ERECLEN EQU RECEND - TABLE

• TABLEN DC A(TABEND - TABLE)

• ETABLEN EQU TABEND - TABLE

• NORECS DC A(ETABLEN/ERECLEN)

DSECTs

• DSECTs provide a technique for applying symbolic names to a storage area in memory

• A DSECT is a pattern of symbolic names and field descriptions

• The DSECT can be used to reference any storage area that can be addressed

• Uses: Table processing, parameter passing, Locate mode I/O

• NO storage associated with a DSECT

DSECT Creation and Use

• CUST DSECT

• NAME DS CL20

• ADDR1 DS CL20

• ADDR2 DS CL20

• CITY DS CL15

• MAIN CSECT

• …

• USING CUST,R8

• LA R8,TABLE

• MVC NAMEO,NAME

•