Assembler Concepts Copyright 2008 by David Woolbright

Explicit Instruction format

OP R1, R2

OP – Operation code

R1 – Register for operand 1

R2 – Register for operand 2

Explicit Instruction Format

• Storage Immediate (SI)

• Explicit Instruction format

• OP D1(B1),I2

• OP – Operation code

• D1 – Displacement for operand 1

• B1 – Base Register for operand 1

• I2 – Immediate Constant for operand 2

Explicit Instruction Format

• Register to Indexed Storage (RX)

• Explicit Instruction format

• OP R1,D2(X2,B2)

• OP – Operation code

• R1 – Register for operand 1

• D2 – Displacement for operand 2

• B2 – Base Register for operand 2

• X2 – Index Register for operand 2

Explicit Instruction Format

• Register to Storage (RS)

• Explicit Instruction format

• OP R1,R3,D2(B2)

• OP – Operation code

• R1 – Register for operand 1

• R3 – Register or mask for operand 3

• D2 – Displacement for operand 2

• B2 – Base Register for operand 2

Reading Explicit Instructions

• MVC 3(4,5),6(7) SS1

• AP 3(4,5),6(7,8) SS2

• MVI 4(8),X’40’ SI

• LR 5,12 RR

• STM 14,12,12(13) RS

• L 6,9(5,8) RX

Reading Mixed Instructions

• X DS CL8

• Y DS CL20

• MVC X(3),6(7) SS1

• MVC X(L’Y),Y SS1

• AP X(3),Y(8) SS2

• MVI X,X’40’ SI

• LR R5,R12 RR

• STM R14,R12,SAVE RS

• L R6,X(8) RX

Movement of Data

Architecture – Program Status Word

• PSW is a logical collection of data that indicates the current status of the machine

• Contains two important fields:

• Condition Code (2 bits)
• Instruction Address (24 or 31 bit addresses)

Architecture – Condition Code

• Condition code (2 bits)

• 00 – equal
• 01 – low
• 10 – high
• 11 – overflow

• Test the condition code with Branch Instructions

• CLC X,Y SET COND CODE

• BE THERE TEST CC

• …

• THERE EQU *

Architecture – Instruction Address

• Contains the address of the “next” instruction

• S/360 had a 24 bit address field

• Expanded to 31 bits in the 1970’s

• 224 = 2 megabytes of storage

• 231 = 2 gigabytes of storage

How does a computer work?

• Fetch/Execute Cycle

• 1) Fetch the next instruction
• 2) Decode the instruction
• 3) Update the Instruction address field
• 4) Execute the decoded instruction
• 5) Go to step 1

• How does branching work?

Defining Data and Data Areas

• Format for defining data

• name DS r TLn

• name DC r TLn’constant’

• r – repetition factor

• T – data type

• L – length

• N - integer

Data Types - Character

• Examples

• X DC CL3’ABC’

• Y DS CL2000

• Z DS 0CL5

• DS CL3

• A DS CL2

• One character per byte

• EBCDIC representation

• Max DC size is 256

• Max DS size is 65,535

• Express constant as a character string in single quotes

• Constants padded with blanks or truncated

EBCDIC Encoding

• Character Hex Equivalent Character Hex Equivalent

•  

• A C1 S E2

• B C2 T E3

• C C3 U E4

• D C4 V E5

• E C5 W E6

• F C6 X E7

• G C7 Y E8

• H C8 Z E9

• I C9

• J D1

• K D2 BLANK 40

• L D3 COMMA 6B

• M D4 PERIOD 4B

• N D5 ASTERISK 5C

• O D6

• P D7

• Q D8

• R D9

EBCDIC Encoding

• Character Hex Equivalent

• 0 F0

• 1 F1

• 2 F2

• 3 F3

• 4 F4

• 5 F5

• 6 F6

• 7 F7

• 8 F8

• 9 F9

• blank 40

• comma 6b

• decimal point 4b

•