All-optical lip-lops based on semiconductor technologies
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combination of SR flip-flop and T flip-flop. Like SR flip-flop, J and K signals are also used as
set and reset signals: J=K=0 makes the flip-flop maintain its previous state; J=1 K=0 sets it to
“state 1”; and J=0 K=1 sets it “state 0”. However, in SR flip-flop, S=R=1 is forbidden, but in
JK flip-flop, J=K=1 is allowed and the flip-flop toggles its state in this condition, like a T flip-
flop.
Toggle
Q
1
1
Reset
0
1
0
Set
1
0
1
Hold state
Q
0
0
Comment
Q
next
K
J
Toggle
Q
1
1
Reset
0
1
0
Set
1
0
1
Hold state
Q
0
0
Comment
Q
next
K
J
CLK
Q
1
0
0
1
0
CLK
∩
K
∩Q
K
J
0
1
1
0
1
AND 2
Reset
AND 1
Set
Q
CLK
∩
J
∩Q
(a)
(b)
(c)
Fig. 19. Clocked JK flip-flop: (a) characteristic table; (b) logic circuits; (c) working principle.
Fig. 20. Clocked JK flip-flop operation.
The setup of clocked JK flip-flop is shown in Fig. 19(b). The two complementary outputs of
two ring lasers of SR latch are used as Q and inverted Q respectively. “AND 1” carries out
AND function between the clock, J, and inverted Q; whereas “AND 2” carries out AND
between the clock, K, and Q. Similar to SR flip-flop, the JK flip-flop can be set and reset by
external signals, so CLK∩J and CLK∩K are partially carried out in two AND gates.
However, the JK flip-flop can toggle its state like a T flip-flop, so the feedback of Q at
previous state must also be taken into account in the two AND gates. When a clock pulse
comes, if J=K=0 it can not pass through “AND 1” and “AND 2”, so neither “Set” nor “Reset”
receives a pulse, and the latch remains at its previous state. If J=1 K=0, the clock pulse is
blocked by “AND 2”, but in “AND 1” there are two possible cases. If Q=1 the clock pulse is
blocked, so “Set” receives no pulse and the latch will remain at “state 1”; otherwise if Q=0
the clock pulse can pass through “AND 1”, and the latch will be set to “state 1”. So in the
case of J=1 K=0, the flip-flop will be set to “state 1” no matter in which state it was.
Similarly, if J=0 K=1, the clock pulse is blocked by “AND 1”. But for “AND 2”, if Q=1 the
clock pulse can pass through, so the latch will be set to “state 0”, otherwise if Q=1 the clock
pulse is blocked and the latch will stay in “state 0”. So the flip-flop will be set to “state 0” no
matter in which state it was. Finally, if J=K=1 we also have to consider two cases of Q. If
Q=1, the clock pulse is blocked by “AND 1” but can pass through “AND 2”, so the latch is
set to “state 0”; otherwise, the clock pulse can pass through “AND 1” but is blocked by
“AND 2”, and the latch is set to “state 1”. In both two cases, the flip-flop changes its state,
which is called state toggling.
In Fig. 20 clocked JK flip-flop operation is experimentally demonstrated. The clock pulse has
a repetition rate of 200kHz and a pulsewidth of 1μs. J and K both quasi-periodic pulse
trains, with repetition rate of 100kHz and pulsewidth of 1μs, synchronized with the clock.
However, in order to realize all four cases of J=K=0, J=1 K=0, J=0 K=1, and J=K=1, in every 4
periods (40μs) of J and K, there is one pulse missed, as shown in Fig.12. It could be observed
that the JK flip-flop operation has a good agreement with Fig. 19(c). The wavelengths of
clock, J, and K are λ
CLK
=1554.1nm, λ
J
=1552.5nm and λ
K
=1550.5nm respectively, and the
wavelength of Q is λ
Q
=1549.3nm, so the output of “AND 1” is at λ
1
=2λ
J
-λ
CLK
=1550.9nm and
the output of “AND 2” is at λ
2
=2λ
K
-λ
CLK
=1546.9nm.
4.5 Three-state flip-flop
Together with clocked flip-flops, another interesting evolution of the basic flip-flop shown
in paragraph 3 is the upgrade to multi-state flip-flop. A multi-state memory could in fact
extend a 1×2 optical switch to a larger dimension of 1×N, depending on the number of states
of the memory.
The setup of the three-state optical memory is shown in Fig. 21 (Wang et al., 2008, a), which
consists of three coupled SOA fiber ring lasers operating at three different wavelengths. The
memory has three states. In “state 1”, only ring 1 is lasing, whereas ring 2 and ring 3 are
suppressed; the output light of SOA 1 is split by coupler A into two portions: one portion
passes through Path 1 (the dashed red line) and then saturates SOA 3, making ring 3
suppressed; the other portion passes through Path 2 (the dashed green line) and then
saturates SOA 2, making ring 2 suppressed. In “state 1”, the optical memory emits a CW
light at the wavelength of λ
1
from output 1 port. Similarly, in “state 2”, only ring 2 is lasing,
and the memory emits a CW light at λ
2
. Finally in “state 3”, only ring 3 is lasing.
To dynamically change the state, three setting couplers are inserted into the ring cavities,
each corresponding to a particular state. One pulse injected into set 1 port is split to saturate
SOA 3 and SOA 2, and it could not reach SOA 1. Thus ring 2 and ring 3 are both suppressed
while ring 1 could lase; the memory is set to “state 1”. Similarly for set 2 and set 3.
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